I'm curious if anyone has had success designing inductors in this process? The top metal seems good enough but wondering if metal fill (assuming it is done by the fab and not in the designer's control) would make the final results unpredictable.
I'm curious if anyone has had success designing inductors in this process? The top metal seems good enough but wondering if metal fill (assuming it is done by the fab and not in the designer's control) would make the final results unpredictable.
If you like, I can see if I can figure out how we got ASITIC working at our site... I did fix cadence's inductor pcell generator. I could reach out to them and see if they would let me put it in the wild as well. It was broken forever until I found the need to stand it up to do EMX inductors on Sky130.
I made a Cocotb Analog-Mixed-Signal (AMS) extension in about less than an hour using Claude. It can output VCD of Verilog simulations along with real-valued signals from ngspice. Any suggestions to improve it?
https://vlsida.github.io/cocotbext-ams/(edited)
ngspice bridge for cocotb — open-source mixed-signal co-simulation
4
Matt G. (Mobius)
I made a Cocotb Analog-Mixed-Signal (AMS) extension in about less than an hour using Claude. It can output VCD of Verilog simulations along with real-valued signals from ngspice. Any suggestions to improve it?
https://vlsida.github.io/cocotbext-ams/(edited)
1
At Wed I have my master exam. After that, I could provide you the information you need 